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dc.contributor.author | Shawky, Ahmed | |
dc.contributor.author | Aly, Mokhtar | |
dc.contributor.author | Rodriguez, Jose | |
dc.date.accessioned | 2024-09-26T00:38:28Z | |
dc.date.available | 2024-09-26T00:38:28Z | |
dc.date.issued | 2023 | |
dc.identifier.issn | 2169-3536 | |
dc.identifier.other | Mendeley: 3b194c15-a8b4-3243-bd94-896e739c0964 | |
dc.identifier.uri | https://repositorio.uss.cl/handle/uss/12930 | |
dc.description | Publisher Copyright: © 2013 IEEE. | |
dc.description.abstract | Differential inverters develop the PWM of internal DC-DC modules by correlating fundamental frequency of load with high switching frequency to maintain inherent characteristic operation and achieve pure higher/lower AC output voltage with smaller size. However, no generalized design method applicable for many DC-DC modules topologies has been demonstrated up till now, to realize efficient differential inverter with accurate power loss prediction. Consequently, a generic design process utilizing one parameter (modulation index gain) as well as new power losses modeling for all elements, such as switching devices, inductors, capacitors, and extra, are proposed in this paper. Novel decoupling between both operational frequencies through a two-stage calculation algorithm is the main attractive feature where, all losses are calculated based on the switching frequency of DC-DC modules then all losses are averaged accordingly over fundamental frequency. Doing this obtains RMS currents in terms of actual duty cycle and other parameters without adding complex mathematics at various PWM schemes, such as SVMS, CMS and DMS. The proposed work is simultaneously employed for many DC-DC modules topologies and verified in simulation and experiments using 0.7kW 50kHz isolated SEPIC-based DC-DC modules, as a case study. The error into actual duty cycle is decreased from 5.19% to 2.47% in the case of CMS at different power ratings. Further, it is reduced to 2.64% and 1.86% for SVMS and DMS, respectively. Finally, smart foretelling of power loss in each element of differential inverter is considered crucial for future efficiency improvement. | en |
dc.description.abstract | Differential inverters develop the PWM of internal DC-DC modules by correlating fundamental frequency of load with high switching frequency to maintain inherent characteristic operation and achieve higher/lower pure output AC voltage with smaller size. However, no generalized design method applicable for many DC-DC modules topologies has been demonstrated up till now, to realize efficient differential inverter with accurate power loss prediction. Consequently, a generic design process utilizing one parameter (modulation index gain) as well as a new power losses modeling for all elements, such as switching devices, inductors, capacitors, and extra, are proposed in this paper. Novel decoupling between both operational frequencies through a two-stage calculation algorithm is the main attractive feature where, all losses are calculated based on the switching frequency of DC-DC modules then all losses are averaged accordingly over fundamental frequency. Doing this obtains RMS currents in terms of actual duty cycle and other parameters without adding complex mathematics at various PWM schemes, such as SVMS, CMS and DMS. The proposed work is simultaneously employed for many DC-DC modules topologies and verified in simulation and experiments using 0.7kW 50kHz isolated SEPIC-based DC-DC modules, as a case study. The error into actual duty cycle is decreased from 5.19% to 2.47% in the case of CMS at different power ratings. Further, it is reduced to 2.64% and 1.86% for SVMS and DMS, respectively. Finally, smart foretelling of power loss in each element of differential inverter is considered crucial for future efficiency improvement. | es |
dc.language.iso | eng | |
dc.relation.ispartof | vol. 11 Issue: Pages: 52790-52811 | |
dc.source | IEEE Access | |
dc.title | Differential Inverters : A General Design Procedure Integrating a Novel Power Losses Modeling Approach for Utilized DC-DC Modules at Different Modulation Schemes | en |
dc.type | Artículo | |
dc.identifier.doi | 10.1109/ACCESS.2023.3281297 | |
dc.publisher.department | Facultad de Ingeniería, Arquitectura y Diseño |
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